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長庚大學 電子工程學系
勤勞樸實 追求卓越
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王哲麒教授

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王哲麒

教授

組別

固態電子組

電話

5784

Email

jcwang@mail.cgu.edu.tw

實驗室

半導體實驗室(工學院B1樓)

學歷

  1. 國立交通大學電子研究所博士 (1998.09~2003.11)
  2. 國立交通大學電子工程系學士 (1994.09~1998.06)

經歷

  1. 長庚大學電子系教授(2015.08~迄今)
  2. 長庚大學電子系副教授(2011.08~2015.07)
  3. 長庚大學電子系助理教授 (2008.12~2011.07)
  4. 南亞科技研發部門元件開發處元件製程模擬課課經理 (2008.02~2008.11)
  5. 南亞科技研發部門元件開發處元件製程模擬課小組長 (2007.08~2008.02)
  6. 南亞科技研發部門製程開發處元件工程部小組長 (2006.03~2007.08)
  7. 南亞科技研發部門製程開發處元件工程部資深工程師 (2003.12~2006.03)

開授課程

98學年度第二學期

專長與研究領域

  • 金屬閘極/高介電常數材料與元件之研究
  • 先進記憶體元件製作與研究
  • 生醫感測元件與製程研究
  • 先進元件量測及可靠度
  • 三維元件與製程模擬

簡歷

Jer-Chyi Wang was born in Taoyuan, Taiwan, R.O.C., in 1976. He received the B.S. and Ph.D. degrees from the National Chiao-Tung University, Hsinchu, Taiwan, in 1998 and 2003, respectively.

In 2003, he joined the Nanya Technology Corporation, Taoyuan, Taiwan, where he has been engaged in the research on dynamic random access memory (DRAM). He was promoted as the process and device simulation section manager in 2008. Since 2009, he has been with the Department of Electronic Engineering, Chang Gung University Taoyuan, Taiwan, as an Assistant Professor. His current research interests include the characteristics and reliability of MOSFETs, metal-gate/high-k technology, advanced memory device fabrication, 3-D process and device simulation, and bio-sensor device fabrication and its applications.

著作列表

Journal articles & book chapters:

1.  Cheng-En Lue, Jer-Chyi Wang, Dorota G. Pijanowska, Chia-Ming Yang, I-Shun Wang, Huang-Chia Lee, Chao-Sung Lai, “Hysteresis Effect on Traps of Si3N4 Sensing Membranes for Difference pH Sensitivity,” Microelectronics Reliability, vol. 50, no. 5, pp. 738-741, May 2010. (SCI: IF=1.29)

2.  Tseng-Fu Lu, Jer-Chyi Wang, Kuan-I Ho, Chung-Po Chang, Chia-Ming Yang, and Chao-Sung Lai, “Non-ideal effects improvement of sulfur hexafluoride plasma treated hafnium oxide film based on electrolyte-insulator-semiconductor structure for pH sensor application,” Microelectronics Reliability, vol. 50, no. 5, pp. 742-746, May 2010. (SCI: IF=1.29)

3.  Jer-Chyi Wang, Pai-Chi Chou, Chao-Sung Lai, Wen-Hui Lee, and Chi-Fong Ai, “Characteristics Optimization of N2O Annealing on Tungsten Nanocrystal with W/Si Dual-sputtered Method for Nonvolatile Memory Application,” Microelectronics Reliability, vol. 50, no. 5, pp. 639-642, May 2010. (SCI: IF=1.29)

4.  Hsing-Kan Peng, Chao-Sung Lai, Jer-Chyi Wang, “Threshold Voltage (Vth) Tunability of p-Channel Metal Oxide Semiconductor Field Effect Transistor with Ternary HfxMoyNz Metal Gate and Gd2O3 High-k Gate Dielectric,” Japanese Journal of Applied Physics, vol. 49, no. 4, pp. 04DA15, Apr. 2010. (SCI: IF=1.309)

5.  Chao-Sung Lai, Cheng-En Lue, Jer-Chyi Wang, Ching-Mie Wu, Chia-Ming Yang, and Hsin-Yu Chen, “Differential LAPS with PVC and HfO2 membranes for pH sensors,” Japanese Journal of Applied Physics, vol. 49, no. 4, pp. 04DL10, Apr. 2010. (SCI: IF=1.309)

6.  Jer-Chyi Wang, Chao-Sung Lai, Yu-Kai Chen, Chih-Ting Lin, Chuan-Pu Liu, Michael R. S. Huang, and Yu-Ching Fang, “Characteristics of Gadolinium Oxide Nanocrystal Memory with Optimized Rapid Thermal Annealing,” Electrochemical and Solid-State Letters, vol. 12, no. 6, pp. H202-H204, June 2009. (SCI: IF=2.001)

7.  Pai-Chi Chou, Chao-Sung Lai, Jer-Chyi Wang, Woei-Cherng Wu, Li-Chi Liu, Yu-Ching Fang, Li Hsu, and Hui-Chun Wang, “High-k HfxGdyOz Charge Trapping Layer in Silicon–Oxide–Nitride–Silicon Type Nonvolatile Memory by In situ Radio Frequency Dual-Sputtering Method,” Japanese Journal of Applied Physics, vol. 48, no. 5, pp. 05DF01, May, 2009. (SCI: IF=1.309)

8.  Woei-Cherng Wu, Tien-Sheng Chao, Te-Hsin Chiu, Jer-Chyi Wang, Chao-Sung Lai, Ming-Wen Ma, and Wen-Cheng Lo, “Positive Bias Temperature Instability (PBTI) Characteristics of Contact-Etch-Stop-Layer-Induced Local-Tensile-Strained HfO2 nMOSFET,” IEEE Electron Device Letters, vol. 29, no. 12, pp. 1340-1343, Dec. 2008. (SCI: IF=3.049)

9.  Woei-Cherng Wu, Tien-Sheng Chao, Te-Hsin Chiu, Jer-Chyi Wang, Chao-Sung Lai, Ming-Wen Ma, and Wen-Cheng Lo, “Performance and Interface Characterization for Contact Etch Stop Layer–Strained nMOSFET with HfO2 Gate Dielectrics under Pulsed-IV Measurement,” Electrochemical and Solid-State Letters, vol. 11, no. 8, pp. H230-H232, Aug. 2008. (SCI: IF=2.001)

10. Woei Cherng Wu, Chao-Sung Lai, Tzu-Ming Wang, Jer-Chyi Wang, Chih Wei Hsu, Ming Wen Ma, Wen-Cheng Lo, and Tien Sheng Chao, “Carrier Transportation Mechanism of the TaN/HfO2/IL/Si Structure with Silicon Surface Fluorine Implantation,” IEEE Trans. on Electron Devices, vol. 55, no. 7, pp. 1639-1646, July 2008. (SCI: IF=2.73)

11. Woei-Cherng Wu, Chao-Sung Lai, Zhu Ming Wang, Jer-Chyi Wang, Ming Wen Ma, and Tien-Sheng Chao “Current Transport Mechanism of HfO2 Gate Dielectric with Fluorine Incorporation,” Electrochemical and Solid-State Letters, vol. 11, no. 1, pp. H15-H18, Jan. 2008. (SCI: IF=2.001)

12. Woei-Cherng Wu, Chao-Sung Lai, Jer-Chyi Wang, Jian Hao Chen, Ming Wen Ma and Tien-Sheng Chao “High Performance HfO2 Gate Dielectrics Fluorinated by Post-deposition CF4 Plasma Treatment,” Journal of the Electrochemical Society vol. 154, no. 7, pp. H561-H565, July 2007. (SCI: IF=2.437)

13. Woei-Cherng Wu, Tien-Sheng Chao, Wu-Ching Peng, Wen-Luh Yang, Jer-Chyi Wang, Jain-Hao Chen, Chao-Sung Lai, and Tsung-Yu Yang, “Highly Reliable multi-level and 2-bits/cell operation of Wrapped-Select-Gate SONOS memory,” IEEE Electron Device Letters, vol. 28, no.3, pp. 214-216, Mar. 2007. (SCI: IF=3.049)

14. Chao Sung Lai, Woei Cherng Wu, Tien Sheng Chao, Jian Hao Chen, Jer-Chyi Wang, Li Lin Tay, and Nelson Rowell, “Suppression of Interfacial Reaction for HfO2 on Silicon by Pre-CF4 Plasma Treatment,” Applied Physics Letters, vol. 89, no. 7, pp. 072904, 14 Aug., 2006. (SCI: IF=3.726)

15. Chao Sung Lai, Shing Kan Peng, Tung Ming Pan, Jer-Chyi Wang, and Kung Ming Fan, “Work Function Adjustment by Nitrogen Incorporation in HfNx Gate Electrode with Post Metal Annealing,” Electrochemical and Solid-State Letters, vol. 9, no. 7, pp. G239-G241, July, 2006. (SCI: IF=2.001)

16. Chao Sung Lai, Woei Cherng Wu, Jer-Chyi Wang, and Tien Sheng Chao, “Characteristics of Fluorine Implantation for HfO2 Gate Dielectrics with High-Temperature Post-deposition Annealing,” Japanese Journal of Applied Physics, vol. 45, no. 4B, pp. 2893–2897, April, 2006. (SCI: IF=1.309)

17. Tung Ming Pan, Chao Sung Lai, Hui Hsin Hsu, Chun Lin Chen, Jian Der Lee, Kuan Ti Wang, and Jer-Chyi Wang, “Excellent Frequency Dispersion of Thin Gadolinium Oxide High-k Gate Dielectrics,” Applied Physics Letters, vol. 87, no. 26, pp. 262908, 26 Dec., 2005. (SCI: IF=3.726)

18. Jer-Chyi Wang, De Ching Shie, Tan Fu Lei, and Chung Len Lee, “Soft Breakdown of Hafnium Oxynitride Gate Dielectrics,” Journal of Applied Physics, vol. 98, no. 2, pp. 024503, 15 July, 2005. (SCI: IF=2.201)

19. Chao Sung Lai, Woei Cherng Wu, Jer-Chyi Wang, and Tien sheng Chao, “Characterization of CF4-plasma Fluorinated HfO2 Gate Dielectrics with TaN Metal Gate,” Applied Physics Letters, vol. 86, no. 22, pp. 222905, 30 May, 2005. (SCI: IF=3.726)

20. Chao Sung Lai, Woei Cherng Wu, Kung Ming Fan, Jer-Chyi Wang, and Shian Jyh Lin, “Effects of Post CF4 Plasma Treatment on the HfO2 Thin Film,” Japanese Journal of Applied Physics, vol. 44, no. 4B, pp. 2307–2310, April, 2005. (SCI: IF=1.309)

21. Jer-Chyi Wang, Kuo Cheng Chiang, Tan Fu Lei, and Chung Len Lee, “Carrier Transportation of Rapid Thermal Annealed CeO2 Gate Dielectrics,” Electrochemical and Solid-State Letters, vol. 7, no. 12, pp. E55-E57, Dec., 2004. (SCI: IF=2.001)

22. Jer-Chyi Wang, D. C. Shie, T. F. Lei, and C. L. Lee, “Turnaround of hysterisis for capacitance-voltage characteristics of hafnium oxynitride dielectrics,” Applied Physics Letters, vol. 84, no. 9, pp. 1531-1533, 1 Mar., 2004. (SCI: IF=3.726)

23. Jer-Chyi Wang, Yen Ping Hung, Chung Len Lee, and Tan Fu Lei, “Improved Characteristics of Ultra-Thin CeO2 by Using Post Nitridation Annealing,” Journal of the Electrochemical Society, vol. 151, no. 2, pp. F17-F21, Feb., 2004. (SCI: IF=2.437)

24. Jer-Chyi Wang, Jam Wem Lee, Liang Tai Kuo, Tan Fu Lei, and Chung Len Lee, “High Reliability Ultra-Thin Interpoly-Oxynitride Dielectrics Prepared by N2O Plasma Annealing,” Journal of the Electrochemical Society, vol. 150, no. 12, pp. G730-734, Dec., 2003. (SCI: IF=2.437)

25. Jer-Chyi Wang, De Ching Shie, Tan Fu Lei, and Chung Len Lee, “Characterization of Temperature Dependence for HfO2 Gate Dielectrics Treated in NH3 Plasma,” Electrochemical and Solid-State Letters, vol. 6, no. 10, pp. F34-F36, Oct., 2003. (SCI: IF=2.001)

26. Jer-Chyi Wang, S. H. Chiao, C. L. Lee, T. F. Lei, Y. M. Lin, M. F. Wang, S. C. Chen, C. H. Yu, and M. S. Liang, “A Physical Model for the Hysteresis Phenomenon of the Ultra-thin ZrO2 Film,” Journal of Applied Physics, vol. 92, no. 7, pp. 3936-3940, 1 Oct., 2002. (SCI: IF=2.201)

Conference & proceeding papers:

1.  Chih-Ting Lin, Jer-Chyi Wang, Chao-Sung Lai, Jui-Lin Hsu, and Chi-Fong Ai, “CF4 Plasma Treatment on Gd2O3 Nanocrystal Memory for High Performance Nonvolatile Memory Application,” 217th Electrochemical Society (ECS) Meeting, 2010

2.  Yu-Ren Ye, Jer-Chyi Wang, and Chao-Sung Lai, “Improved Resistive Switching Performance of Gd2O3 Films by Fluorine Incorporation and Gd/O Ratio Adjustment,” 217th Electrochemical Society (ECS) Meeting, 2010.

3.  Tseng-Fu Lu, Jer-Chyi Wang, Chao-Sung Lai, Chia-Ming Yang, Min-Hsien Wu, Chuan-Pu Liu, Rong-Shie Huang, and Yu-Ching Fang, “A Novel Flash-Ion-Sensitive Field-Effect Transistor (FISFET) with HfO2/Gd2O3(Gd) Nano-crystal/SiO2 Sensing Membranes under Super Nernstian Phenomenon for pH and Urea Detection,” IEEE International Electron Devices Meeting (IEDM), Technical Digest., pp. 603-606, 2009. (EI)

4.  Pai-Chi Chou, Jer-Chyi Wang, Woei-Cherng Wu and Chao-Sung Lai, “Improved Dielectric Phase and Interfacial Dipole Control of Gd2O3-doped HfO2 Gate Dielectrics by Co-sputtering Technique,” 2009 Materials Research Society (MRS) Fall Meeting, 2009.

5.  Huai-Hsien Chiu, Jer-Chyi Wang, Chao-Sung Lai, Woei-Cherng Wu, and Tien-Sheng Chao, “Interfacial Reaction Suppression of Gate First CMOS HfO2 Achieve Zero Interfacial Layer by Pre-CF4 Plasma Passivation,” International Electron Device and Materials Symposium (IEDMS), 2009.

6.  Chih-Ting Lin, Jer-Chyi Wang, Chao-Sung Lai, Jui-Lin Hsu, and Chi-Fong Ai, “Improved Characteristics of Gd2O3 Nanocrystal Memory with Substrate High-Low Jinction Induced Band-to-Band (BTBT) Electron Injection,” International Electron Device and Materials Symposium (IEDMS), 2009.

7.  Pai-Chi Chou, Jer-Chyi Wang, Chao-Sung Lai, and Li-Chi Liu, “Process Optimization of Dual-sputtered HfGdO Charge Trapping Layer in SONOS-Type Nonvolatile Memory,” International Electron Device and Materials Symposium (IEDMS), 2009.

8.  Pai-Chi Chou, Jer-Chyi Wang, Chao-Sung Lai, “Characteristics Improvement of N2O Annealing on Tungsten Nanocrystal Memory with W/Si Dual-Sputtering Method,” International Electron Device and Materials Symposium (IEDMS), 2009.

9.  Woei-Cherng Wu, Tien-Sheng Chao, Kuan-Ti Wang, Shih-Ching Lee, Te-Hsin Chiu, Tsung-Yi Lu, Chao-Sung Lai, Jer-Chyi Wang, Ming-Wen Ma, Kuo-Hsing Kao and Wen-Cheng Lo, “Novel Dynamic Threshold Voltage Contact Etching Stop Layer (DT-CESL) Strained HfO2 nMOSFET for Very Low Voltage Operation (0.7V),” Solid State Devices and Materials (SSDM), 2009.

10. Hsing-Kan Peng, Chao-Sung Lai and Jer-Chyi Wang, “Threshold Voltage (Vth) Tunability of pMOSFETs with Ternary HfxMoyNz Metal Gate and Gd2O3 High-k Gate Dielectric,” Solid State Devices and Materials (SSDM), 2009

11. Woei-Cherng Wu, Chao-Sung Lai, Shih-Ching Lee, Ming-Wen Ma, Tien-Sheng Chao, Jer-Chyi Wang, Chih-Wei Hsu, Pai-Chi Chou, Jian-Hao Chen, Kuo-Hsing Kao, Wen-Cheng Lo, Tsung-Yi Lu, Li-Lin Tay, and Nelson Rowell, “Fluorinated HfO2 Gate Dielectrics Engineering for CMOS by pre- and post-CF4 Plasma Passivation,” IEEE International Electron Devices Meeting (IEDM), Technical Digest., pp. 405-408, 2008. (EI)

12. Woei-Cherng Wu, Tien-Sheng Chao, Te-Hsin Chiu, Chao-Sung Lai, Jer-Chyi Wang, Ming-Wen Ma, and Wen-Cheng Lo, “New Observation on PBTI Characteristics of Contact Etching Stop Layer (CESL) Induced Tensile Strained HfO2 nMOSFET,” Solid State Devices and Materials (SSDM), 2008

13. Yu-Kai Chen, Chao-Sung Lai, Jer-Chyi Wang, Pai-Chi Chou, Chih-Ting Lin, Yu-Ching Fang, Li Hsu, Chuan-Pu Liu, and R. S. Huang, “Temperature Effects on Recrystallization and Improvements of Pure Gadolinium (Gd) Nanocrystal (NC) for Flash Memory,” Solid State Devices and Materials (SSDM), 2008

14. Woei-Cherng Wu, Tien-Sheng Chao, Te-Hsin Chiu,Jer-Chyi Wang, Chao-Sung Lai, Ming-Wen Ma, Wen-Cheng Lo, and Yi-Hsun Ho, “Performance Enhancement for Strained HfO2 nMOSFET with Contact Etch Stop Layer (CESL) under Pulsed-IV Measurement,” IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), 2007. (EI)

15. Woei-Cherng Wu, Chao-Sung Lai, Zhu Ming Wang, Jer-Chyi Wang, Ming Wen Ma, and Tien-Sheng Chao, “Current Transportation Mechanism for HfO2 with Silicon Surface Fluorine Implantation (SSFI) in CMOS Application,” Solid State Devices and Materials (SSDM), 2007.

16. Woei-Cherng Wu, Tien-Sheng Chao, Wu-Ching Peng, Wen-Luh Yang, Jer-Chyi Wang, Jian-Hao Chen, Chao-Sung Lai, and Tsung-Yu Yang, “A Highly Reliable multi-level and 2-bits/cell operation of Wrapped-Select-Gate SONOS memory with Optimized ONO Thickness,” IEEE International Symposium on VLSI Technology, System & Application (VLSI-TSA), April 23-25, 2007. (EI)

17. Chao-Sung Lai, Jer-Chyi Wang, S. C. Yang, J. Y. Wong, and Shing Kan Peng, “Nitrogen Induced Extrinsic States (NIES) in Effective Work Function Instability of TiNx/SiO2 and TiNx/HfO2 Gate Stacks,” Solid State Devices and Materials (SSDM), pp. 438-439, 2006

18. Woei-Cherng Wu, Chao-Sung Lai, Kuan Ti Wang, Jer-Chyi Wang and Tien-Sheng Chao, “Current Transportation Mechanism and Interface States Characterization of Sputtered Gd2O3 Gate Dielectrics for ULSI Application,” Solid State Devices and Materials (SSDM), pp. 1100-1101, 2006

19. Tung-Ming Pan, Chao-Sung Lai, Hui-Hsin Hsu, Jer-Chyi Wang, Kuan-Di Wang, Chun-Lin Chen, Jian-Chi Lin, and Jian-Der Lee, “The Electrical Characteristics of Thin Gadolinium Oxide Films on Silicon Substrate by DC Reactive RF-sputtering,” IEEE Int. Semiconductor Device Research Symposium, pp. 132-133, 2005. (EI)

20. Chao Sung Lai, Shing Kan Peng, Jer-Chyi Wang, Tung Ming Pan, Kung Ming Fan, and Jian Yi Wong, “Work Function Adjustment by Nitrogen Incorporation in HfN Gate Electrode,” Solid State Devices and Materials (SSDM), pp. 510-511, 2005.

21. Chao Sung Lai, Woei Cherng Wu, Jer-Chyi Wang, and Tian Sheng Chao, “Thermal Stability Improvements for HfO2 by Fluorine Implantation,” Solid State Devices and Materials (SSDM), pp. 234-235, 2005

22. Jer-Chyi Wang, Woei Cherng Wu, Chao Sung Lai, Jam Wem Lee, Kuo Cheng Chiang, De Ching Shie, Tan Fu Lei, and Chung Len Lee, “Characterization of Novel HfTiO Gate Dielectrics Post-treated by NH3 Plasma and Ultra-violet Rays,” Solid State Devices and Materials (SSDM), pp. 242-243, 2005

23. Chao Sung Lai, Woei Cherng Wu, Kung Ming Fan, Jer-Chyi Wang, and Shian-Jyh Lin, “Hysteresis Phenomenon Improvements of HfO2 by CF4 Plasma Treatment,” Solid State Devices and Materials (SSDM), pp. 742-743, 2004

24. Jer-Chyi Wang, Kuo Cheng Chiang, Tan Fu Lei, and Chung Len Lee, “Characteristics Improvement and Carrier Transportation of CeO2 Gate Dielectrics with Rapid Thermal Annealing,” 11th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2004), pp. 161-164, 2004. (EI)

25. Kuo Cheng Chiang, Jer-Chyi Wang, and Tan Fu Lei, “Improved Characteristics of Ultra-Thin Cerium Dioxide with Rapid Thermal Annealing,” 4th WSEAS International Conference on NANOELECTRONICS and NANOTECHNOLOGY (ICONN 2004), 2004

26. Jer-Chyi Wang, De Ching Shie, Tan Fu Lei, and Chung Len Lee, “Characterization of Soft Breakdown Effects for Post-deposition NH3 Plasma Treated HfO2 Gate Dielectrics,” Solid State Devices and Materials (SSDM), pp. 706-707, 2003

27. Jer-Chyi Wang, Jam Wem Lee, Tan Fu Lei, and Chung Len Lee, “A Novel Post N2O Plasma Treatment Approach on Ultra-thin CeO2 Gate Dielectrics,” 22nd European Conference on Surface Science (ECOSS), 2003

28. Jer-Chyi Wang, J. W. Lee, T. F. Lei, and C. L. Lee, “High Reliability Ultra-Thin Interpoly-Oxynitride Dielectrics Prepared by N2O Plasma Annealing,” World Scientific and Engineering Academy and Society (WESAS), pp. 457-232, 2003

29. Jer-Chyi Wang, D. C. Shie, T. F. Lei, and C. L. Lee, “Novel Turnaround Characteristics of Hysteresis for HfO2 Gate Dielectrics Using Post-deposition NH3 Plasma Treatment,” Eleventh Canadian Semiconductor Technology Conference (CSTC), pp. TP.51, 2003

30. Jer-Chyi Wang, De Ching Shie, Tan Fu Lei, Chung Len Lee, Yiming Li, and Jam Wem Lee, “A Post NH3 Plasma Treatment Approach to the Characterization of Hysteresis for Nanoscale HfO2 Gate Dielectrics,” Silicon Nanoelectronics Workshop (SNW), pp. 120-121, 2003

31. Jer-Chyi Wang, Yu Hsien Lin, Yen Ping Hung, Tan Fu Lei, and Chung Len Lee, “Characteristics of Ultra-Thin Cerium Dielectrics with Surface Nitridation Pretreatment and Post Furnace Annealing,” International Electron Device and Materials Symposium (IEDMS), pp. 98-101, 2002

32. Jer-Chyi Wang, Tan Fu Lei, and Chung Len Lee, “The Effects of Furnace or Rapid Thermal Annealing on Thin Silicon Nitride Dielectrics,” International Electron Device and Materials Symposium (IEDMS), Symposium A, pp. 105-108, 2000

Books:

Patents:

  1. Two bit U-shaped memory structure and method of making the same, US7667262, Feb. 2010

other:

 

 

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