Your browser does not support JavaScript!
長庚大學 電子工程學系
勤勞樸實 追求卓越
分類清單
首頁 > 成員簡介 > 教師
許炳堅講座教授
  • 許炳堅講座教授

email: bsheu[at]mail.cgu.edu.tw ([at]=@)

電 話: 03-2118800 分 機: 3878

專 長:

積體電路與系統設計 VLSI

訊號處理與多媒體

人工智慧,類神經網路與深度學習

現代通識:跨領域全球化競爭力與全人教育

 

學歷

學士:國立台灣大學電機系,滿貫的七次書卷獎

博士:美國加州柏克萊大學電機與資訊學系

 

經歷

(1985 – 1998) 正教授:美國加州洛杉磯市南加州大學(USC)電機系與生醫工程系

(1999 – 2006) 處長美國加州矽谷新思科技公司(Synopsys Corp.) 研發組織

(2006 – 2015) 處長新竹科學園區,台積電(TSMC) 研發組織

(2016年起) 講座教授:長庚大學 電子系

 

開授課程

104學年第二學期:工程數學-複變函數

105學年第一學期:電子學3

<準備中> 現代通識課:跨領域全球化競爭力與全人教育

 

重大獎項

(1987) 美國國科會.工程啟動獎:Engineering Initiation AwardNational Science Foundation

(1995) 最佳論文獎Best Paper AwardIEEE Transactions on VLSI Systems

(1996) 國際電機電子學會會士IEEE Fellow

(1997) 最佳論文獎Best Paper AwardIEEE Guillemin-Cauer Award

(1998) 傅爾布萊特資深學者獎Fulbright Senior Scholarship AwardU.S. Information Agency

(1999) 學術會五十週年金質獎Golden Jubilee Award, IEEE Circuits and Systems Society

(2004) 學術會優質服務獎IEEE Circuits and Systems SocietyMeritorious Service Award

(2006) 教育部第一屆教育奉獻獎

(2016) 國際會議獎Evening Session Award as OrganizerIEEE International Solid-State Circuits Conference

 

獲頒「榮譽.講座教授

國立交通大學 (2003年起)

國立台灣科技大學 (2011年起)

國立台北科技大學 (2013年起)

國立宜蘭大學 (2015年起)

國立台北大學 (2015年起)

國立台北商業大學 (2016年起)

國立中山大學 (2016年起)

 

國際學術期刊.職務

客座編輯IEEE Journal of Solid-State Circuits 特刊,Mar. 1992 & 1993

客座編輯IEEE Transactions on VLSI Systems 特刊,June 1993

副編輯IEEE Transactions on VLSI Systems1993 - 1996

副編輯IEEE Transactions on Neural Networks1993 - 1995

副編輯IEEE Transactions on Circuits and SystemsPart I - Express Letters1995

副編輯IEEE Transactions on Circuits and SystemsPart II - VLSI DSP1995

編輯IEEE Circuits and Devices Magazine1995 - 1997

客座編輯IEEE Trans. on Circuits & Systems for Video Technology特刊,Aug. 1997

總編輯IEEE Transactions on VLSI Systems1997 & 1998

創刊總編輯IEEE Transactions on Multimedia, 1998 & 1999

客座編輯Proceedings of IEEE旗艦期刊,奈米科技特刊,Nov. 2003

編輯委員Proceedings of IEEE旗艦期刊,2005 - 2007

編輯委員Proceedings of IEEE旗艦期刊,2008 - 2010

編輯委員IEEE Access online mega-journal上網期刊,2013

編輯委員IEEE Journal on Emerging and Selected Topics in Circuits and Systems2014 & 2015

 

國際學術會.專業職務

會議課程.主席:Tutorials ChairIEEE International Symposium on Circuits and Systems1995

技術委員會主席Neural Systems and Applications Technical CommitteeIEEE Circuits & Systems Society1995

技術委員會主席VLSI Systems and Applications Technical CommitteeIEEE Circuits & Systems Society1996 & 1997

技術委員會創始主席Multimedia Systems and Applications Technical CommitteeIEEE Circuits & Systems Society1996

學術會.議員Board of Governors MemberIEEE Circuits & Systems Society1996 & 1997

大會議程.主席IEEE International Conference on Neural Networks1996

大會議程.主席IEEE International Conference on Computer Design1997

大會.主席IEEE International Conference on Computer Design1998

副總裁:IEEE Circuits & Systems Society1998

總裁:President-ElectPresidentPast PresidentIEEE Circuits & Systems Society1999 - 2001

會議.技術委員IEEE VLSI Circuits Symposium2012- 2015

會議.技術委員IEEE International Solid-State Circuits Conference2013- 2016

學生論文.審核委員:Student Research Preview CommitteeIEEE International Solid-State Circuits Conference2012年起

 

國內學術會.專業職務

人才培育分項.召集人:國科會 晶片系統國家型計劃,2007 – 2010

產學校園大使:台灣半導體產業協會 (TSIA)2016年起

 

專書

(1) 許炳堅,《數位時代的孫悟空》,引號文創工作室,ISBN 978-98692-92504,台灣半導體產業協會贊助發行,2016

 

(2) 許炳堅、吳重雨、柯明道,《追求21世紀的金鑰匙》,交通大學出版社,ISBN 978-98682-997402007

 

(3) 吳重雨、許炳堅,《21世紀現代教育之我見》,交通大學出版社,ISBN 986-81857-5-02006

 

(4) B. J. Sheu, M. Ismail, 主編,Multimedia Technologies for Applications, 666 pages, (ISBN 0-7803-1174-4) IEEE Press: New York, 1998.

 

(5) B. J. Sheu, M. Ismail, E. Sanchez-Sinencio, T. Wu, 主編,Microsystems Technology for Multimedia Applications, 720 pages, (ISBN 0-7803-1156-6) IEEE Press: New York, May 1995.

 

(6) B. J. Sheu, J. Choi,Neural Information Processing and VLSI, 556 pages, (ISBN 0-7923-9547-6) Kluwer Academic Publishers: Boston, MA, 1995.

 

(7) B. W. Lee, B. J. Sheu,Hardware Annealing in Analog VLSI Neurocomputing, 234 pages, (ISBN 0-7923-9132-2) Kluwer Academic Publishers: Boston, MA, 1991.

 

科技書的專章

(1) B. W. Lee, B. J. Sheu, <Design and Analysis of VLSI Neural Networks>, Chapter 8 inNeural Networks for Signal Processing, pp. 229-286, Editor: B. Kosko, (ISBN 0-13-617390-X) Prentice-Hall: Englewood Cliffs, NJ, 1992.

 

(2) J. Choi, B. J. Sheu, <Neural Information Processing>, Chapter 7 inAnalog VLSI for Signal and Information Processing, pp. 311-357, Editors: M. Ismail, T. Fiez, (ISBN 0-07-032386-0) McGraw-Hill: Reading, MA, 1994.

 

(3) J. C. Chang, B. J. Sheu, <MOS Storage Circuits>, Chapter 12.5.4 inCircuits and Filters Handbook, Editor: W.-K. Chen, CRC Press & IEEE Press, 1995; & 2nd Edition, 2003.

 

(4) R. C. Chang, B. J. Sheu, <Transmission Gates>, Chapter 12.4.2 inCircuits and Filters Handbook, Editor: W.-K. Chen, CRC Press & IEEE Press, 1995, & 2nd Edition, 2003.

 

(5) B. J. Sheu, E. Chou, R. Tsai, D. Chen, <VLSI Neural Networks: Design Challenges and Opportunities>, Chapter 19, pp. 261-273,Computational Intelligence, Editors: M. Palaniswami, Y. Attikiouzel, R. J. Marks II, D. Fogel, T. Fukada, IEEE Press, 1995.

 

(6) T. H. Wu, B. J. Sheu, <Simulated Annealing, Boltzmann Machine and Hardware Annealing>, Chapter 74 inIndustrial Electronics Handbook, Editor: J. D. Irwin, (ISBN 0-8493-8343-9) CRC Press, 1997.

 

(7) Y. Oshima, B. J. Sheu, S. H. Jen, <DRAM Chips>, inEncyclopedia of Electrical and Electronics Engineering, Editor: J. Webster, Wiley & Sons Inc., 1998.

 

(8) T. W. Berger, R. D. Brinton, V. Z. Marmarelis, B. J. Sheu, A. R. Tanguay, <Brain-Implantable Biomimetic Electronics as a Neural Prosthesis for Hippocampal Memory Function>, Chapter 12 in Toward Replacement Parts for the Brain, Editors: T. W. Berger, D. L. Glanzman, (ISBN 0-262-02577-9), MIT Press, 2005.

 

學術期刊:12篇代表著作 (總數超過70篇)

(1) B. J. Sheu, D. L. Scharfetter, P. K. Ko, M.-C. Jeng, "BSIM: Berkeley short-channel IGFET model for MOS transistors," IEEE Journal of Solid- State Circuits, vol. SC-22, no. 4, pp. 558-566, Aug. 1987. (also included inDigital MOS Integrated Circuits II, Editor: Elmasry, pp. 101-108, IEEE Press, 1991).

 

(2) B. J. Sheu, C. Hu, "Switch-induced error voltage on a switched capacitor," IEEE Journal of Solid-State Circuits, vol. SC-19, no. 4, pp. 519-525, Aug. 1984.

 

(3) B. J. Sheu, P. K. Ko, "Measurement and modeling of short-channel MOS transistor gate capacitances," IEEE Journal of Solid-State Circuits, vol. SC-22, no. 3, pp. 464-472, Jun. 1987.

 

(4) B. J. Sheu, A. H. Fung, Y.-N. Lai, "A knowledge-based approach to analog integrated circuit design" IEEE Transactions on Circuits and Systems, vol. CAS-35, no. 2, pp. 256-258, Feb. 1988.

 

(5) B. J. Sheu, W.-J. Hsu, B. W. Lee, "An integrated-circuit reliability circuit simulator - RELY," IEEE Journal of Solid-State Circuits, vol. SC-24, no. 2, pp. 473-477, Apr. 1989.

 

(6) B. W. Lee, B. J. Sheu, "Modified Hopfield neural networks for retrieving the optimal solution," IEEE Transactions on Neural Networks, vol. 2, no. 1, pp. 137-142, Jan. 1991.

 

(7) W.-C. Fang, B. J. Sheu, O. T.-C. Chen, J. Choi, "A VLSI neural processor for image data compression using self-organizing networks," IEEE Transactions on Neural Networks, vol. 3, no. 3, pp. 506-518, May 1992.

 

(8) B. W. Lee, B. J. Sheu, "Paralleled hardware annealing for optimal solutions on electronic neural networks," IEEE Transactions on Neural Networks, vol. 4, no. 4, pp. 588-599, July 1993.

 

(9) W.-C. Fang, C.-Y. Chang, B. J. Sheu, O. T.-C. Chen, J. C. Curlander, "VLSI systolic binary tree-searched vector quantizer for image compression," IEEE Transactions on VLSI Systems, vol. 2, no. 1, pp. 33-44, Mar. 1994.

 

(10) S. H. Bang, B. J. Sheu, "A neural network for detection of signals in communication," IEEE Transactions on Circuits and Systems I, vol. 43, no. 8, pp. 644-655, Aug. 1996.

 

(11) R. H. Tsai, B. J. Sheu, T. W. Berger, "A VLSI Neural Network Processor Based on Hippocampal Model," Journal of Analog ICs & Signal Processing, Kluwer Academic Publishers, vol. 15, pp. 201-203, 1998.

 

(12) T. W. Berger, M. Baudry, R. D. Brinton, J.-S. Liaw, V. Marmarelis, A. Y. Park, B. J. Sheu, A. R. Tanguay, “Brain-Implantable Biomimetic Electronics as the Next Era in Neural Prosthetics,” Proceedings of the IEEE, vol. 89, no. 7, pp. 993-1012, July 2001.

 

國際會議:12篇代表著作(總數超過100篇)

(1) B. J. Sheu, P. K. Ko, F.-C. Hsu, "Characterization of intrinsic capacitances of small-geometry MOSFET's," IEEE 1984 Symposium on VLSI Technology, Tech. Dig., pp. 80-81, Sept. 1984.

 

(2) B. J. Sheu, P. K. Ko, "An analytical model for intrinsic capacitances of short-channel MOSFETs," IEEE IEDM (International Electron Devices Meeting) Technical Digest, pp. 300-303, 1984.

 

(3) B. W. Lee, B. J. Sheu, "An investigation on local minimum of Hopfield network for optimization circuits," IEEE International Conference on Neural Networks Proceedings, vol. I, pp. 45-51, San Diego, CA, July 1988.

 

(4) B. W. Lee, J.-C. Lee, B. J. Sheu, "VLSI image processors using analog programmable synapses and neurons" IEEE International Joint Conference on Neural Networks, vol. II, pp. 575-580, San Diego, CA, June 1990.

 

(5) C.-F. Chang, B. J. Sheu, W.-C. Fang, J. Choi, "A trainable analog neural chip for image compression," IEEE Custom Integrated Circuits Conference, pp. 16.1.1-4, San Diego, CA, May 1991.

 

(6) B. J. Sheu, B. W. Lee, C.-F. Chang, "Hardware annealing for fast retrieval of optimal solutions in Hopfield neural networks," IEEE/INNS International Joint Conference on Neural Networks, vol. II, pp. 327-332, Seattle, WA, July 1991.

 

(7) O. T.-C. Chen, B. J. Sheu, W.-C. Fang, "Adaptive vector quantizer for image compression using self-organization approach," IEEE International Conference on Acoustic, Speech and Signal Processing, vol. II, pp. 385-388, San Francisco, CA, Mar. 1992.

 

(8) B. J. Sheu, R. H. Tsai, E. Y. Chou, T. Berger, "A hippocampal model implementation using VLSI table-look-up and model-based approaches," IEEE International Conference on Neural Networks, vol. 2, pp. 1508-1512, Perth, Australia, Nov. 1995.

 

(9) R. H. Tsai, T. W. Berger, B. J. Sheu, "VLSI design for real-time signal processing based on biologically realistic neural models," IEEE International Conference on Neural Networks, Washington, DC, pp. 676-681, June 1996.

 

(10) R. H. Tsai, B. J. Sheu, M. Y. Wang, S. Jen, "Two-dimensional cellular neural networks for pre-processing in face recognition and digital library search," IEEE International Symposium on Circuits and Systems, pp. 733-736, Hong Kong, June 1997.

 

(11) T. W. Berger, J. L. Granacki, V. Z. Marmarelis, B. J. Sheu, A. R. Tanguay Jr., “Brain-Implantable Biomimetic Electronics and Neural Prosthetics,” Proceedings of 1st International IEEE EMBS Conference on Neural Engineering, pp. 108-111, Capri Island, Italy Mar. 2003.

 

(12) Bing J. Sheu, et al., “Enabling Circuit Design using FinFETs through Close Ecosystem Collaboration”, pp. T110-T111, IEEE VLSI Symposia on Technology & Circuits, Kyoto, Japan, June 2013.

 

中文文章

(1) 許炳堅,<勇敢面對21世紀年輕人的新挑戰>,台大電機系系友季刊,24 - 25期,2007

 

(2) 許炳堅,<環環相扣、工程學術的金鑰匙在哪裡?>,台大校友雙月刊,5220077E論壇2  http://www.alum.ntu.edu.tw/wordpress/?p=674

 

(3) 許炳堅陳姵樺,<掀開「國際電機電子學會會士的神秘面紗>,台大電機系系友季刊,32 - 33期,2009

 

(4) 許炳堅,<21世紀年輕人看清未來、擁抱未來、戰勝未來>,台大電機系系友季刊,36-38 期,2010

 

(5) 許炳堅,<21世紀 全球競爭力、創新與合作模式優先>pp. 550 – 595,《奇普士的異想世界》,(編輯群:吳重雨、陳良基、柯明道、陳巍仁、許炳堅) 國立交通大學出版社,ISBN 978-986-6301-19-32011

 

(6) 許炳堅,<電子新智慧、啟發21世紀人腦創新>,pp. 596 – 623,《奇普士的異想世界》,(編輯群:吳重雨、陳良基、柯明道、陳巍仁、許炳堅) 國立交通大學出版社,2011

 

(7) 許炳堅,<從工程、跨越管理、到 卓越領導力>,台大校友雙月刊,7620117E論壇 http://www.alum.ntu.edu.tw/wordpress/?p=11691

 

(8) 許炳堅,<揚帆、展翅,如何成為開創的人才>交通大學校友會-友聲雜誌社449 - 4502011 & 2012

 

連載於《台大校訊》的18篇文章

(1) 許炳堅,<21世紀台灣的教育與產業在制度面的困境>,台大校訊,1152 期,20131016

 

(2) 許炳堅,<面對21世紀人機競逐的挑戰>,台大校訊,1156 期,20131113

 

(3) 許炳堅,<21世紀成功者們的經驗分享>,台大校訊,1160 期,20131211

 

(4) 許炳堅,<老子、孔子、西遊記一脈相承,到現代版的深入、淺出、旁通、忘我、無我>,台大校訊,1166 期,2014122

 

(5) 許炳堅,<四十不惑、淺出的悟淨是華人最弱的一項,卻是歐美的強項>,台大校訊,1168 期,2014226

 

(6) 許炳堅,<多元領界宇宙觀:學科知識、哲學智慧、宗教信仰並存不悖>,台大校訊,1172 期,2014326

 

(7) 許炳堅,<從工程或科學、跨越管理、到卓越領導力>,台大校訊,1176 期,2014430

 

(8) 許炳堅,<揚帆、展翅,成為開創的人才>,台大校訊,1180 期,2014528

 

(9) 許炳堅,<智能機器在全世界的大量使用,對年輕人就業造成空前的危機>,台大校訊,1184 期,2014625

 

(10) 許炳堅,<人類文明的時代巨輪帶動民族文化的革新,適度擷取諸子百家的多元論述>,台大校訊,1186 期,2014723

 

(11) 許炳堅,<勇敢地跨出保守與安全的框架,增大想像空間與多著眼於未來>,台大校訊,1188 期,2014820

 

(12) 許炳堅,<學業成績與事業成就為何經常南轅北轍?>,台大校訊,1193 期,20141008

 

(13) 許炳堅,<歐美人士發散型海闊天空諸多選擇,華人收斂型定於一尊追求對>,台大校訊,1196 期,20141029

 

(14) 許炳堅,<贏在轉彎處,折學與廣義哲學在21世紀的重要性>,台大校訊,1200期,20141126

 

(15) 許炳堅,<21世紀成功者們的妙招>,台大校訊,1205期,20141231

 

(16) 許炳堅,<搶先未來的新機會,認清現在的諸多選擇,善用數千年累積的知識與智慧>,台大校訊,1208期,2015121日。

 

(17) 許炳堅,<5Q翻轉,站在巨人肩膀上的數位天使>,台大校訊,1213期,2015325

 

(18) 許炳堅,<提升臺灣人才競爭力系列,綜觀與前瞻>,台大校訊,1217期,2015429

 

瀏覽數  
將此文章推薦給親友
請輸入此驗證碼
Voice Play
更換驗證碼